I am a PhD student supervised by Prof. Nathaniel Bleier, in the Computer Science and Engineering Division at the University of Michigan. My research focuses on computer architecture and electronic design automation — with particular emphasis on automated reasoning, and agile hardware design.
Previously, B.Eng. in Electrical & Electronic Engineering (Glasgow × UESTC). I worked closely with Prof. Jian Weng at KAUST and Dr. Yu Zeng during undergrad.
SMT-driven equivalence checking and model refinement for accelerator designs; developing tractable abstractions that preserve functional intent while cutting proof time.
Unifying architectural simulation and RTL implementation under one abstraction, so architects can iterate with software-like velocity — without sacrificing cycle-accurate fidelity.
A selection of my peer-reviewed articles and papers.
Haoran Jin, Jirong Yang, Barry Lyu, Ruijie Gao, Nathaniel Bleier
International Symposium on Computer Architecture (ISCA), 2026
Jian Weng, Boyang Han, Derui Gao, Ruijie Gao, Wanning Zhang, An Zhong, Ceyu Xu, Jihao Xin, Yangzhixin Luo, Lisa Wu Wills, Marco Canini
International Symposium on Computer Architecture (ISCA), 2025
Zhongzhi Yu, Zheng Wang, Yuhan Li, Ruijie Gao, Xiaoya Zhou, Sreenidhi Reddy Bommu, Yang Zhao, Yingyan Lin
Design Automation Conference (DAC), 2024
UESTC × Glasgow
UESTC × Glasgow
UESTC × Glasgow
University of Michigan
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