I am a PhD student supervised by Prof. Nathaniel Bleier, in the Computer Science and Engineering Division at the University of Michigan. My research explores how machine-readable hardware semantics can serve as a foundation for trustworthy design automation for emerging accelerators, enabling compiler generation, hardware–software co-design, and verified agentic design-space exploration.
Previously, B.Eng. in Electrical & Electronic Engineering (Glasgow × UESTC). I worked closely with Prof. Jian Weng at KAUST and Dr. Yu Zeng during undergrad.
Developing machine-readable representations of hardware behavior and using them to build trustworthy tools for compiler generation, verified optimization, and accelerator design exploration.
Building high-level abstractions and reasoning tools that jointly optimize programs, workload mappings, ISAs, and microarchitectures through program synthesis, equality saturation, and compiler-guided agentic search.
A selection of my peer-reviewed articles and papers.
Ruijie Gao, Haoran Jin, Jirong Yang, Nathaniel Bleier
International Conference on Computer-Aided Design (ICCAD), 2026
Haoran Jin, Jirong Yang, Barry Lyu, Ruijie Gao, Nathaniel Bleier
International Symposium on Computer Architecture (ISCA), 2026
Jian Weng, Boyang Han, Derui Gao, Ruijie Gao, Wanning Zhang, An Zhong, Ceyu Xu, Jihao Xin, Yangzhixin Luo, Lisa Wu Wills, Marco Canini
International Symposium on Computer Architecture (ISCA), 2025
Zhongzhi Yu, Zheng Wang, Yuhan Li, Ruijie Gao, Xiaoya Zhou, Sreenidhi Reddy Bommu, Yang Zhao, Yingyan Lin
Design Automation Conference (DAC), 2024
UESTC × Glasgow
UESTC × Glasgow
UESTC × Glasgow
University of Michigan
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